The present invention relates to data processing systems and, in particular, to the nodes used with the system bus in such systems. The present invention is particularly advantageous in that a bus utilizing such nodes is characterized by high performance, low power consumption and reduced space used for bus logic on a printed circuit board, relative to prior art devices.
In computers and other data processing devices, a bus is commonly employed to interconnect the various elements of the device. For example, a central processing unit is typically connected to memory components, input/output devices, etc. via a bus capable of carrying the signals associated with operation of each element. These signals include, for example, data signals, clock signals and other control signals. The bus must be capable of carrying such signals to all of the components coupled to it so that the desired operation can be carried out by the computer system.
Because the bus is utilized in virtually every operation performed by the computer system, it is a key element whose characteristics have a major impact on overall performance of the system. For example, speed of operation is limited to a degree since many of the signals within the computer must be transmitted via the bus to the appropriate component; thus, the speed at which the bus is capable of responding to and carrying data is a critical consideration.
A further critical aspect of bus operation relates to the consumption of power by the bus. Since the bus is used in nearly every operation, it is important that the bus and associated interface logic consume as little power as possible in its functioning. Prior art attempts to reduce power consumption have usually resulted in slowing down the operating speed of the bus. Conversely, attempts to increase operating speed have typically resulted in undesirable increases in power consumption.
Another problem encountered concerns high-performance bus interface logic which requires large portions of space on a printed circuit board, leaving less space for the functional logic which must also be mounted on the board.